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https://github.com/No-Chicken/Power-Pico.git
synced 2026-04-03 13:02:36 +08:00
update cubemx setting
This commit is contained in:
@@ -25,7 +25,7 @@ Dma.ADC1.2.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.ADC1.2.Instance=DMA2_Stream0
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Dma.ADC1.2.Instance=DMA2_Stream0
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Dma.ADC1.2.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
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Dma.ADC1.2.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
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Dma.ADC1.2.MemInc=DMA_MINC_ENABLE
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Dma.ADC1.2.MemInc=DMA_MINC_ENABLE
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Dma.ADC1.2.Mode=DMA_CIRCULAR
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Dma.ADC1.2.Mode=DMA_NORMAL
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Dma.ADC1.2.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
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Dma.ADC1.2.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
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Dma.ADC1.2.PeriphInc=DMA_PINC_DISABLE
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Dma.ADC1.2.PeriphInc=DMA_PINC_DISABLE
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Dma.ADC1.2.Priority=DMA_PRIORITY_LOW
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Dma.ADC1.2.Priority=DMA_PRIORITY_LOW
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@@ -33,7 +33,8 @@ Dma.ADC1.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlign
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Dma.Request0=SPI2_TX
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Dma.Request0=SPI2_TX
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Dma.Request1=USART6_RX
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Dma.Request1=USART6_RX
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Dma.Request2=ADC1
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Dma.Request2=ADC1
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Dma.RequestsNb=3
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Dma.Request3=USART6_TX
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Dma.RequestsNb=4
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Dma.SPI2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
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Dma.SPI2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
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Dma.SPI2_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.SPI2_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.SPI2_TX.0.Instance=DMA1_Stream4
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Dma.SPI2_TX.0.Instance=DMA1_Stream4
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@@ -54,6 +55,16 @@ Dma.USART6_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART6_RX.1.PeriphInc=DMA_PINC_DISABLE
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Dma.USART6_RX.1.PeriphInc=DMA_PINC_DISABLE
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Dma.USART6_RX.1.Priority=DMA_PRIORITY_LOW
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Dma.USART6_RX.1.Priority=DMA_PRIORITY_LOW
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Dma.USART6_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
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Dma.USART6_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
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Dma.USART6_TX.3.Direction=DMA_MEMORY_TO_PERIPH
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Dma.USART6_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART6_TX.3.Instance=DMA2_Stream6
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Dma.USART6_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.USART6_TX.3.MemInc=DMA_MINC_ENABLE
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Dma.USART6_TX.3.Mode=DMA_NORMAL
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Dma.USART6_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART6_TX.3.PeriphInc=DMA_PINC_DISABLE
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Dma.USART6_TX.3.Priority=DMA_PRIORITY_LOW
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Dma.USART6_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
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FREERTOS.IPParameters=Tasks01,configUSE_TICK_HOOK
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FREERTOS.IPParameters=Tasks01,configUSE_TICK_HOOK
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FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
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FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
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FREERTOS.configUSE_TICK_HOOK=1
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FREERTOS.configUSE_TICK_HOOK=1
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@@ -105,6 +116,7 @@ NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.ForceEnableDMAVector=true
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NVIC.ForceEnableDMAVector=true
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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@@ -252,7 +264,8 @@ TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
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TIM4.IPParameters=Prescaler,Channel-PWM Generation4 CH4,Period
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TIM4.IPParameters=Prescaler,Channel-PWM Generation4 CH4,Period
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TIM4.Period=250
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TIM4.Period=250
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TIM4.Prescaler=99
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TIM4.Prescaler=99
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USART6.IPParameters=VirtualMode
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USART6.BaudRate=1500000
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USART6.IPParameters=VirtualMode,BaudRate
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USART6.VirtualMode=VM_ASYNC
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USART6.VirtualMode=VM_ASYNC
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VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
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VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
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VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
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VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
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