diff --git a/software/Power_Pico/MDK-ARM/DebugConfig/power_pico_STM32F411CEUx.dbgconf b/software/Power_Pico/MDK-ARM/DebugConfig/power_pico_STM32F411CEUx.dbgconf
deleted file mode 100644
index de9f9b9..0000000
--- a/software/Power_Pico/MDK-ARM/DebugConfig/power_pico_STM32F411CEUx.dbgconf
+++ /dev/null
@@ -1,41 +0,0 @@
-// File: STM32F401xBCDE_411xCE.dbgconf
-// Version: 1.0.0
-// Note: refer to STM32F401xB/C STM32F401xD/E reference manual (RM0368)
-// refer to STM32F401xB/C STM32F401xD/E datasheet
-// refer to STM32F411xC/E reference manual (RM0383)
-// refer to STM32F411xC/E datasheet
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-// Debug MCU configuration register (DBGMCU_CR)
-// DBG_STANDBY Debug Standby Mode
-// DBG_STOP Debug Stop Mode
-// DBG_SLEEP Debug Sleep Mode
-//
-DbgMCU_CR = 0x00000007;
-
-// Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
-// Reserved bits must be kept at reset value
-// DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS timeout mode stopped when core is halted
-// DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS timeout mode stopped when core is halted
-// DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS timeout mode stopped when core is halted
-// DBG_IWDG_STOP Independent watchdog stopped when core is halted
-// DBG_WWDG_STOP Window watchdog stopped when core is halted
-// DBG_RTC_STOP RTC stopped when core is halted
-// DBG_TIM5_STOP TIM5 counter stopped when core is halted
-// DBG_TIM4_STOP TIM4 counter stopped when core is halted
-// DBG_TIM3_STOP TIM3 counter stopped when core is halted
-// DBG_TIM2_STOP TIM2 counter stopped when core is halted
-//
-DbgMCU_APB1_Fz = 0x00000000;
-
-// Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
-// Reserved bits must be kept at reset value
-// DBG_TIM11_STOP TIM11 counter stopped when core is halted
-// DBG_TIM10_STOP TIM10 counter stopped when core is halted
-// DBG_TIM9_STOP TIM9 counter stopped when core is halted
-// DBG_TIM1_STOP TIM1 counter stopped when core is halted
-//
-DbgMCU_APB2_Fz = 0x00000000;
-
-// <<< end of configuration section >>>
\ No newline at end of file
diff --git a/software/Power_Pico/Middlewares/LVGL/lv_conf.h b/software/Power_Pico/Middlewares/LVGL/lv_conf.h
index 862607f..498649e 100644
--- a/software/Power_Pico/Middlewares/LVGL/lv_conf.h
+++ b/software/Power_Pico/Middlewares/LVGL/lv_conf.h
@@ -443,11 +443,11 @@
#define LV_ATTRIBUTE_FLUSH_READY
/*Required alignment size for buffers*/
-#define LV_ATTRIBUTE_MEM_ALIGN_SIZE 1
+#define LV_ATTRIBUTE_MEM_ALIGN_SIZE 32
/*Will be added where memories needs to be aligned (with -Os data might not be aligned to boundary by default).
* E.g. __attribute__((aligned(4)))*/
-#define LV_ATTRIBUTE_MEM_ALIGN
+#define LV_ATTRIBUTE_MEM_ALIGN __attribute__((aligned(LV_ATTRIBUTE_MEM_ALIGN_SIZE)))
/*Attribute to mark large constant arrays for example font's bitmaps*/
#define LV_ATTRIBUTE_LARGE_CONST
diff --git a/software/Power_Pico/STM32F411XX_FLASH.ld b/software/Power_Pico/STM32F411XX_FLASH.ld
index 067bec3..bf3e8aa 100644
--- a/software/Power_Pico/STM32F411XX_FLASH.ld
+++ b/software/Power_Pico/STM32F411XX_FLASH.ld
@@ -62,7 +62,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
-FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
+FLASH (rx) : ORIGIN = 0x8010000, LENGTH = 512K
}
/* Define output sections */
diff --git a/software/Power_Pico/startup_stm32f411xe.s b/software/Power_Pico/startup_stm32f411xe.s
index bae927c..1c1f70d 100644
--- a/software/Power_Pico/startup_stm32f411xe.s
+++ b/software/Power_Pico/startup_stm32f411xe.s
@@ -2,7 +2,7 @@
******************************************************************************
* @file startup_stm32f411xe.s
* @author MCD Application Team
- * @brief STM32F411xExx Devices vector table for GCC based toolchains.
+ * @brief STM32F411xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
@@ -23,7 +23,7 @@
*
******************************************************************************
*/
-
+
.syntax unified
.cpu cortex-m4
.fpu softvfp
@@ -32,10 +32,10 @@
.global g_pfnVectors
.global Default_Handler
-/* start address for the initialization values of the .data section.
+/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
-/* start address for the .data section. defined in linker script */
+/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
@@ -49,7 +49,7 @@ defined in linker script */
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
- * supplied main() routine is called.
+ * supplied main() routine is called.
* @param None
* @retval : None
*/
@@ -57,13 +57,13 @@ defined in linker script */
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
-Reset_Handler:
+Reset_Handler:
ldr sp, =_estack /* set stack pointer */
/* Call the clock system initialization function.*/
- bl SystemInit
+ bl SystemInit
-/* Copy the data segment initializers from flash to SRAM */
+/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
@@ -79,7 +79,7 @@ LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
-
+
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
@@ -98,15 +98,15 @@ LoopFillZerobss:
bl __libc_init_array
/* Call the application's entry point.*/
bl main
- bx lr
+ bx lr
.size Reset_Handler, .-Reset_Handler
/**
- * @brief This is the code that gets called when the processor receives an
+ * @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
- * @param None
- * @retval None
+ * @param None
+ * @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
@@ -118,11 +118,11 @@ Infinite_Loop:
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
-*
+*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
-
+
g_pfnVectors:
.word _estack
.word Reset_Handler
@@ -140,114 +140,114 @@ g_pfnVectors:
.word 0
.word PendSV_Handler
.word SysTick_Handler
-
+
/* External Interrupts */
- .word WWDG_IRQHandler /* Window WatchDog */
- .word PVD_IRQHandler /* PVD through EXTI Line detection */
- .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
- .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
- .word FLASH_IRQHandler /* FLASH */
- .word RCC_IRQHandler /* RCC */
- .word EXTI0_IRQHandler /* EXTI Line0 */
- .word EXTI1_IRQHandler /* EXTI Line1 */
- .word EXTI2_IRQHandler /* EXTI Line2 */
- .word EXTI3_IRQHandler /* EXTI Line3 */
- .word EXTI4_IRQHandler /* EXTI Line4 */
- .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
- .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
- .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
- .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
- .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
- .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
- .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
- .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word EXTI9_5_IRQHandler /* External Line[9:5]s */
- .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
- .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
+ .word WWDG_IRQHandler /* Window WatchDog */
+ .word PVD_IRQHandler /* PVD through EXTI Line detection */
+ .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
+ .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
+ .word FLASH_IRQHandler /* FLASH */
+ .word RCC_IRQHandler /* RCC */
+ .word EXTI0_IRQHandler /* EXTI Line0 */
+ .word EXTI1_IRQHandler /* EXTI Line1 */
+ .word EXTI2_IRQHandler /* EXTI Line2 */
+ .word EXTI3_IRQHandler /* EXTI Line3 */
+ .word EXTI4_IRQHandler /* EXTI Line4 */
+ .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
+ .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
+ .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
+ .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
+ .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
+ .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
+ .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
+ .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word EXTI9_5_IRQHandler /* External Line[9:5]s */
+ .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
+ .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
- .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
- .word TIM2_IRQHandler /* TIM2 */
- .word TIM3_IRQHandler /* TIM3 */
- .word TIM4_IRQHandler /* TIM4 */
- .word I2C1_EV_IRQHandler /* I2C1 Event */
- .word I2C1_ER_IRQHandler /* I2C1 Error */
- .word I2C2_EV_IRQHandler /* I2C2 Event */
- .word I2C2_ER_IRQHandler /* I2C2 Error */
- .word SPI1_IRQHandler /* SPI1 */
- .word SPI2_IRQHandler /* SPI2 */
- .word USART1_IRQHandler /* USART1 */
- .word USART2_IRQHandler /* USART2 */
- .word 0 /* Reserved */
- .word EXTI15_10_IRQHandler /* External Line[15:10]s */
- .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
- .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
+ .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
+ .word TIM2_IRQHandler /* TIM2 */
+ .word TIM3_IRQHandler /* TIM3 */
+ .word TIM4_IRQHandler /* TIM4 */
+ .word I2C1_EV_IRQHandler /* I2C1 Event */
+ .word I2C1_ER_IRQHandler /* I2C1 Error */
+ .word I2C2_EV_IRQHandler /* I2C2 Event */
+ .word I2C2_ER_IRQHandler /* I2C2 Error */
+ .word SPI1_IRQHandler /* SPI1 */
+ .word SPI2_IRQHandler /* SPI2 */
+ .word USART1_IRQHandler /* USART1 */
+ .word USART2_IRQHandler /* USART2 */
+ .word 0 /* Reserved */
+ .word EXTI15_10_IRQHandler /* External Line[15:10]s */
+ .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
+ .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
.word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
+ .word 0 /* Reserved */
+ .word SDIO_IRQHandler /* SDIO */
+ .word TIM5_IRQHandler /* TIM5 */
+ .word SPI3_IRQHandler /* SPI3 */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
.word 0 /* Reserved */
- .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
- .word 0 /* Reserved */
- .word SDIO_IRQHandler /* SDIO */
- .word TIM5_IRQHandler /* TIM5 */
- .word SPI3_IRQHandler /* SPI3 */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
- .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
- .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
- .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
- .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word OTG_FS_IRQHandler /* USB OTG FS */
- .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
- .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
- .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
- .word USART6_IRQHandler /* USART6 */
- .word I2C3_EV_IRQHandler /* I2C3 event */
- .word I2C3_ER_IRQHandler /* I2C3 error */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
+ .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
+ .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
+ .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
+ .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
+ .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word OTG_FS_IRQHandler /* USB OTG FS */
+ .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
+ .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
+ .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
+ .word USART6_IRQHandler /* USART6 */
+ .word I2C3_EV_IRQHandler /* I2C3 event */
+ .word I2C3_ER_IRQHandler /* I2C3 error */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
.word 0 /* Reserved */
.word FPU_IRQHandler /* FPU */
- .word 0 /* Reserved */
+ .word 0 /* Reserved */
.word 0 /* Reserved */
.word SPI4_IRQHandler /* SPI4 */
- .word SPI5_IRQHandler /* SPI5 */
-
+ .word SPI5_IRQHandler /* SPI5 */
+
.size g_pfnVectors, .-g_pfnVectors
/*******************************************************************************
*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
* this definition.
-*
+*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
-
+
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
-
+
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
-
+
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
@@ -264,175 +264,175 @@ g_pfnVectors:
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
- .thumb_set SysTick_Handler,Default_Handler
-
- .weak WWDG_IRQHandler
- .thumb_set WWDG_IRQHandler,Default_Handler
-
- .weak PVD_IRQHandler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
-
- .weak TAMP_STAMP_IRQHandler
+
+ .weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
-
- .weak RTC_WKUP_IRQHandler
+
+ .weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
- .weak FLASH_IRQHandler
+
+ .weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
-
- .weak RCC_IRQHandler
+
+ .weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
-
- .weak EXTI0_IRQHandler
+
+ .weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
-
- .weak EXTI1_IRQHandler
+
+ .weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
-
- .weak EXTI2_IRQHandler
- .thumb_set EXTI2_IRQHandler,Default_Handler
-
- .weak EXTI3_IRQHandler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
-
- .weak EXTI4_IRQHandler
+
+ .weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
-
- .weak DMA1_Stream0_IRQHandler
+
+ .weak DMA1_Stream0_IRQHandler
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
-
- .weak DMA1_Stream1_IRQHandler
+
+ .weak DMA1_Stream1_IRQHandler
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
-
- .weak DMA1_Stream2_IRQHandler
+
+ .weak DMA1_Stream2_IRQHandler
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
-
- .weak DMA1_Stream3_IRQHandler
- .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
-
- .weak DMA1_Stream4_IRQHandler
+
+ .weak DMA1_Stream3_IRQHandler
+ .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
+
+ .weak DMA1_Stream4_IRQHandler
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
-
- .weak DMA1_Stream5_IRQHandler
+
+ .weak DMA1_Stream5_IRQHandler
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
-
- .weak DMA1_Stream6_IRQHandler
+
+ .weak DMA1_Stream6_IRQHandler
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
-
- .weak ADC_IRQHandler
+
+ .weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
-
- .weak EXTI9_5_IRQHandler
+
+ .weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
-
- .weak TIM1_BRK_TIM9_IRQHandler
+
+ .weak TIM1_BRK_TIM9_IRQHandler
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
-
- .weak TIM1_UP_TIM10_IRQHandler
+
+ .weak TIM1_UP_TIM10_IRQHandler
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
-
- .weak TIM1_TRG_COM_TIM11_IRQHandler
+
+ .weak TIM1_TRG_COM_TIM11_IRQHandler
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
-
- .weak TIM1_CC_IRQHandler
+
+ .weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
-
- .weak TIM2_IRQHandler
+
+ .weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
-
- .weak TIM3_IRQHandler
+
+ .weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
-
- .weak TIM4_IRQHandler
+
+ .weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
-
- .weak I2C1_EV_IRQHandler
+
+ .weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
-
- .weak I2C1_ER_IRQHandler
+
+ .weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
-
- .weak I2C2_EV_IRQHandler
+
+ .weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
-
- .weak I2C2_ER_IRQHandler
+
+ .weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
-
- .weak SPI1_IRQHandler
+
+ .weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
-
- .weak SPI2_IRQHandler
+
+ .weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
-
- .weak USART1_IRQHandler
+
+ .weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
-
- .weak USART2_IRQHandler
+
+ .weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
-
- .weak EXTI15_10_IRQHandler
+
+ .weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
-
- .weak RTC_Alarm_IRQHandler
+
+ .weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
- .weak OTG_FS_WKUP_IRQHandler
+
+ .weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
-
- .weak DMA1_Stream7_IRQHandler
+
+ .weak DMA1_Stream7_IRQHandler
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
-
- .weak SDIO_IRQHandler
+
+ .weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
-
- .weak TIM5_IRQHandler
+
+ .weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
-
- .weak SPI3_IRQHandler
+
+ .weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
-
- .weak DMA2_Stream0_IRQHandler
+
+ .weak DMA2_Stream0_IRQHandler
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
-
- .weak DMA2_Stream1_IRQHandler
+
+ .weak DMA2_Stream1_IRQHandler
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
-
- .weak DMA2_Stream2_IRQHandler
+
+ .weak DMA2_Stream2_IRQHandler
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
-
- .weak DMA2_Stream3_IRQHandler
+
+ .weak DMA2_Stream3_IRQHandler
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
-
- .weak DMA2_Stream4_IRQHandler
+
+ .weak DMA2_Stream4_IRQHandler
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
-
- .weak OTG_FS_IRQHandler
+
+ .weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
-
- .weak DMA2_Stream5_IRQHandler
+
+ .weak DMA2_Stream5_IRQHandler
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
-
- .weak DMA2_Stream6_IRQHandler
+
+ .weak DMA2_Stream6_IRQHandler
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
-
- .weak DMA2_Stream7_IRQHandler
+
+ .weak DMA2_Stream7_IRQHandler
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
-
- .weak USART6_IRQHandler
+
+ .weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
-
- .weak I2C3_EV_IRQHandler
+
+ .weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
-
- .weak I2C3_ER_IRQHandler
+
+ .weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
- .weak FPU_IRQHandler
- .thumb_set FPU_IRQHandler,Default_Handler
-
- .weak SPI4_IRQHandler
+ .weak SPI4_IRQHandler
.thumb_set SPI4_IRQHandler,Default_Handler
- .weak SPI5_IRQHandler
- .thumb_set SPI5_IRQHandler,Default_Handler
+ .weak SPI5_IRQHandler
+ .thumb_set SPI5_IRQHandler,Default_Handler