From d542bdec209941c321d924ebd6c33f045a7a9d37 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E4=B8=8D=E5=90=83=E6=B2=B9=E7=82=B8=E9=B8=A1?=
 <1425962791@qq.com>
Date: Sat, 7 Feb 2026 10:36:23 +0800
Subject: [PATCH] =?UTF-8?q?=E9=99=8D=E4=BD=8ESPI+DMA=E4=BC=98=E5=85=88?=
 =?UTF-8?q?=E7=BA=A7?=
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---
 Power_Pico/Core/Src/dma.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/Power_Pico/Core/Src/dma.c b/Power_Pico/Core/Src/dma.c
index 8fb0550..fd317ef 100644
--- a/Power_Pico/Core/Src/dma.c
+++ b/Power_Pico/Core/Src/dma.c
@@ -45,17 +45,11 @@ void MX_DMA_Init(void)
 
   /* DMA interrupt init */
   /* DMA1_Stream4_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
+  HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 6, 0);
   HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
   /* DMA2_Stream0_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
-  /* DMA2_Stream1_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
-  HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
-  /* DMA2_Stream6_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
-  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
 
 }